@inproceedings{6d7734fbfd1c42649507af2d3f745c92,
title = "The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate",
abstract = "We report on new observations of hot carrier (HC) degradation in strained Si/Sil-xGex(x =0.2 to 0.5) p-MOSFETs. By using low voltage current-voltage measurement coupled with carrier separation, we are able, for the first time, to easily distinguish the energy distribution of the interface traps. High-K dielectrics on SiGe p-channel show higher interface traps generation located close to conduction band under channel hot carrier stressing and uniform interface trap under drain avalanche hot carrier stressing, both of which can be mitigated by increasing Ge% in the Si/SiGe channel. Detailed study on Si capping layer (=≤ 20{\AA}) shows good immunity against Drain Avalanche Hot Carrier but is degraded under Channel Hot Carrier stressing. The results suggest that higher Ge% and thinner Si cap is preferably for hot carrier reliability for low voltage application with 10yrs lifetime at operating voltage of -0.85 V.",
author = "Loh, {W. Y.} and P. Majhi and Lee, {S. H.} and Oh, {J. W.} and B. Sassman and C. Young and G. Bersuker and Cho, {B. J.} and Park, {C. S.} and Kang, {C. Y.} and P. Kirsch and Lee, {B. H.} and Harris, {H. R.} and Tseng, {H. H.} and R. Jammy",
year = "2008",
month = sep,
day = "23",
doi = "10.1109/VLSIT.2008.4588562",
language = "English",
isbn = "9781424418053",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
pages = "56--57",
booktitle = "2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT",
note = "2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT ; Conference date: 17-06-2008 Through 19-06-2008",
}