The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate

W. Y. Loh, P. Majhi, S. H. Lee, J. W. Oh, B. Sassman, C. Young, G. Bersuker, B. J. Cho, C. S. Park, C. Y. Kang, P. Kirsch, B. H. Lee, H. R. Harris, H. H. Tseng, R. Jammy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

We report on new observations of hot carrier (HC) degradation in strained Si/Sil-xGex(x =0.2 to 0.5) p-MOSFETs. By using low voltage current-voltage measurement coupled with carrier separation, we are able, for the first time, to easily distinguish the energy distribution of the interface traps. High-K dielectrics on SiGe p-channel show higher interface traps generation located close to conduction band under channel hot carrier stressing and uniform interface trap under drain avalanche hot carrier stressing, both of which can be mitigated by increasing Ge% in the Si/SiGe channel. Detailed study on Si capping layer (=≤ 20Å) shows good immunity against Drain Avalanche Hot Carrier but is degraded under Channel Hot Carrier stressing. The results suggest that higher Ge% and thinner Si cap is preferably for hot carrier reliability for low voltage application with 10yrs lifetime at operating voltage of -0.85 V.

Original languageEnglish
Title of host publication2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
Pages56-57
Number of pages2
DOIs
Publication statusPublished - 2008 Sep 23
Event2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT - Honolulu, HI, United States
Duration: 2008 Jun 172008 Jun 19

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Other

Other2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
CountryUnited States
CityHonolulu, HI
Period08/6/1708/6/19

Fingerprint

Hot carriers
Metals
Chemical analysis
Electric potential
Voltage measurement
Electric current measurement
Conduction bands
Degradation

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Loh, W. Y., Majhi, P., Lee, S. H., Oh, J. W., Sassman, B., Young, C., ... Jammy, R. (2008). The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate. In 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT (pp. 56-57). [4588562] (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2008.4588562
Loh, W. Y. ; Majhi, P. ; Lee, S. H. ; Oh, J. W. ; Sassman, B. ; Young, C. ; Bersuker, G. ; Cho, B. J. ; Park, C. S. ; Kang, C. Y. ; Kirsch, P. ; Lee, B. H. ; Harris, H. R. ; Tseng, H. H. ; Jammy, R. / The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate. 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT. 2008. pp. 56-57 (Digest of Technical Papers - Symposium on VLSI Technology).
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title = "The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate",
abstract = "We report on new observations of hot carrier (HC) degradation in strained Si/Sil-xGex(x =0.2 to 0.5) p-MOSFETs. By using low voltage current-voltage measurement coupled with carrier separation, we are able, for the first time, to easily distinguish the energy distribution of the interface traps. High-K dielectrics on SiGe p-channel show higher interface traps generation located close to conduction band under channel hot carrier stressing and uniform interface trap under drain avalanche hot carrier stressing, both of which can be mitigated by increasing Ge{\%} in the Si/SiGe channel. Detailed study on Si capping layer (=≤ 20{\AA}) shows good immunity against Drain Avalanche Hot Carrier but is degraded under Channel Hot Carrier stressing. The results suggest that higher Ge{\%} and thinner Si cap is preferably for hot carrier reliability for low voltage application with 10yrs lifetime at operating voltage of -0.85 V.",
author = "Loh, {W. Y.} and P. Majhi and Lee, {S. H.} and Oh, {J. W.} and B. Sassman and C. Young and G. Bersuker and Cho, {B. J.} and Park, {C. S.} and Kang, {C. Y.} and P. Kirsch and Lee, {B. H.} and Harris, {H. R.} and Tseng, {H. H.} and R. Jammy",
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Loh, WY, Majhi, P, Lee, SH, Oh, JW, Sassman, B, Young, C, Bersuker, G, Cho, BJ, Park, CS, Kang, CY, Kirsch, P, Lee, BH, Harris, HR, Tseng, HH & Jammy, R 2008, The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate. in 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT., 4588562, Digest of Technical Papers - Symposium on VLSI Technology, pp. 56-57, 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT, Honolulu, HI, United States, 08/6/17. https://doi.org/10.1109/VLSIT.2008.4588562

The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate. / Loh, W. Y.; Majhi, P.; Lee, S. H.; Oh, J. W.; Sassman, B.; Young, C.; Bersuker, G.; Cho, B. J.; Park, C. S.; Kang, C. Y.; Kirsch, P.; Lee, B. H.; Harris, H. R.; Tseng, H. H.; Jammy, R.

2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT. 2008. p. 56-57 4588562 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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T1 - The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate

AU - Loh, W. Y.

AU - Majhi, P.

AU - Lee, S. H.

AU - Oh, J. W.

AU - Sassman, B.

AU - Young, C.

AU - Bersuker, G.

AU - Cho, B. J.

AU - Park, C. S.

AU - Kang, C. Y.

AU - Kirsch, P.

AU - Lee, B. H.

AU - Harris, H. R.

AU - Tseng, H. H.

AU - Jammy, R.

PY - 2008/9/23

Y1 - 2008/9/23

N2 - We report on new observations of hot carrier (HC) degradation in strained Si/Sil-xGex(x =0.2 to 0.5) p-MOSFETs. By using low voltage current-voltage measurement coupled with carrier separation, we are able, for the first time, to easily distinguish the energy distribution of the interface traps. High-K dielectrics on SiGe p-channel show higher interface traps generation located close to conduction band under channel hot carrier stressing and uniform interface trap under drain avalanche hot carrier stressing, both of which can be mitigated by increasing Ge% in the Si/SiGe channel. Detailed study on Si capping layer (=≤ 20Å) shows good immunity against Drain Avalanche Hot Carrier but is degraded under Channel Hot Carrier stressing. The results suggest that higher Ge% and thinner Si cap is preferably for hot carrier reliability for low voltage application with 10yrs lifetime at operating voltage of -0.85 V.

AB - We report on new observations of hot carrier (HC) degradation in strained Si/Sil-xGex(x =0.2 to 0.5) p-MOSFETs. By using low voltage current-voltage measurement coupled with carrier separation, we are able, for the first time, to easily distinguish the energy distribution of the interface traps. High-K dielectrics on SiGe p-channel show higher interface traps generation located close to conduction band under channel hot carrier stressing and uniform interface trap under drain avalanche hot carrier stressing, both of which can be mitigated by increasing Ge% in the Si/SiGe channel. Detailed study on Si capping layer (=≤ 20Å) shows good immunity against Drain Avalanche Hot Carrier but is degraded under Channel Hot Carrier stressing. The results suggest that higher Ge% and thinner Si cap is preferably for hot carrier reliability for low voltage application with 10yrs lifetime at operating voltage of -0.85 V.

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DO - 10.1109/VLSIT.2008.4588562

M3 - Conference contribution

AN - SCOPUS:51949102511

SN - 9781424418053

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - 56

EP - 57

BT - 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT

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Loh WY, Majhi P, Lee SH, Oh JW, Sassman B, Young C et al. The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate. In 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT. 2008. p. 56-57. 4588562. (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2008.4588562