The fabrication of the p-type ultra low temperature TFT under 200°C

Hyuck Lim, Kyung Bae Park, Huaxlang Yin, Wenxu Xianyu, Jang Yaon Kwon, Xiaoxin Zhang, Hans S. Cho, Jong Man Kim, Do Young Kim, Ji Sim Jung, Takashi Noguchi

Research output: Contribution to conferencePaperpeer-review

Abstract

We studied the p-channel (p-ch.) poly silicon (Si) thin film transistor (TFT) using ultra low temperature processes below 200°C. By performing the low temperature thermal annealing after obtaining TFT, the device performances, such as the mobility of 64 cm cm2/Vs, and the sub-threshold slope (S.S) of 0.74 Vldec., improved drastically. The p-ch. circuits or complementary MOS (CMOS) design on plastic is expected for future advanced flexible flat panel display (FPD).

Original languageEnglish
Pages1159-1161
Number of pages3
Publication statusPublished - 2005
EventIDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005 - Takamatsu, Japan
Duration: 2005 Dec 62005 Dec 9

Other

OtherIDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005
CountryJapan
CityTakamatsu
Period05/12/605/12/9

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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