The impact of device configuration on the photon-enhanced negative bias thermal instability of GaInZnO thin film transistors

Jang Yeon Kwon, Kyoung Seok Son, Ji Sim Jung, Kwang Hee Lee, Joon Seok Park, Tae Sang Kim, Kwang Hwan Ji, Rino Choi, Jae Kyeong Jeong, Bonwon Koo, Sangyun Lee

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Abstract

We investigated the effect of device configuration on the light-induced negative bias thermal instability of gallium indium zinc oxide transistors. The Vth of back-channel-etch (BCE)-type transistors shifted by -3.5 V, and the subthreshold gate swing (SS) increased from 0.88 to 1.38 V/decade after negative bias illumination temperature stress for 3 h. However, etch-stopper-type devices exhibited small Vth shifts of -0.8 V without degradation in the SS value. It is believed that the inferior instability of the BCE device is associated with the formation of an interfacial molybdenum (Mo) oxychloride layer, which occurs in the course of dry etching Mo using Cl2 / O2 for source/drain patterning.

Original languageEnglish
Pages (from-to)H213-H215
JournalElectrochemical and Solid-State Letters
Volume13
Issue number6
DOIs
Publication statusPublished - 2010

All Science Journal Classification (ASJC) codes

  • Chemical Engineering(all)
  • Materials Science(all)
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering

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    Kwon, J. Y., Son, K. S., Jung, J. S., Lee, K. H., Park, J. S., Kim, T. S., Ji, K. H., Choi, R., Jeong, J. K., Koo, B., & Lee, S. (2010). The impact of device configuration on the photon-enhanced negative bias thermal instability of GaInZnO thin film transistors. Electrochemical and Solid-State Letters, 13(6), H213-H215. https://doi.org/10.1149/1.3381023