As semiconductor node technology becomes finer, the corresponding device dimensions should be reduced. To improve the side effects caused by the scaling-down strategy, fin-shaped field-effect transistors (FinFETs) have been introduced and are being actively researched. However, these thin silicon fins, especially confined within silicon dioxide (SiO2), have a relatively low thermal conductivity when compared with conventional planar bulk FETs. Thus, another issue, called the self-heating effect (SHE), has appeared with the emergence of FinFETs. In this paper, the self-heating effect on 7 nm node bulk FinFETs was investigated through calibrated technology computer-aided design (TCAD) simulation. A thermodynamic transport model is used to consider the self-heating effect on the device. The thermal resistance (R TH) was extracted from the TCAD result and modeled empirically to predict the R TH of sub-7 nm node technology. The empirical R TH model was also implanted in a Berkeley short-channel IGFET model-common multi-gate (BSIM-CMG) to conduct an accurate Simulation Program with Integrated Circuit Emphasis (SPICE) model and simulation.
Bibliographical noteFunding Information:
The electronic design automation (EDA) tool was supported by the IC Design Education Center (IDEC), Seoul, Korea. This work was supported by the Institute of BioMed-IT, Energy-IT and Smart-IT Technology (BEST), a Brain Korea 21 plus program, in Yonsei University.
© 2018 IOP Publishing Ltd.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry