Phase change random access memory with ovonic threshold switch (OTS-PRAM) has been recently highlighted as an alternative to dynamic random access memory to meet the demand for memory capacity expansion in multicore processing. However, read disturb with inrush current (RDI) occurs owing to the snapback phenomenon caused by the threshold switching of the OTS selector in the OTS-PRAM cell, which should be resolved for realizing the practical use of OTS-PRAM. In this study, the RDI is analyzed in detail for the first time. Based on this analysis, a novel thermoelectric cooling read technique (TCR) that utilizes the thermoelectric effect in the storage material of the OTS-PRAM is proposed for effectively resolving the RDI issue. The proposed TCR is verified using the Sentaurus TCAD simulator, and a core structure with the proposed TCR is evaluated. HSPICE simulation results with a memory industry-compatible 0.25-μm core circuit design rule for 20-nm PRAM technology show that the proposed TCR has a power gain of 67%, system performance improvement of 13.9%, and slight area overhead of 3% as compared to the SET-back write technique, which was the most promising technique for resolving the RDI issue until now.
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© 2002-2012 IEEE.
All Science Journal Classification (ASJC) codes
- Computer Science Applications
- Electrical and Electronic Engineering