Threshold voltage control in dual gate ZnO-based thin-film transistors operating at 5 v

Chan Ho Park, Seongil Im

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20 nm thick Al2O3 for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. Whether the top or the bottom gate is biased for sweep or not, our TFT operates almost symmetrically under a low voltage of 5 V showing a field mobility of ∼0.4 cm2 V-1 s -1 along with the on/off ratio of 5 × 104. The threshold voltage of our DG TFT was systematically controlled from 0.5 to 2.0 V by varying the counter gate input from +5 to -2 V.

Original languageEnglish
Article number245112
JournalJournal of Physics D: Applied Physics
Volume41
Issue number24
DOIs
Publication statusPublished - 2008 Dec 1

Fingerprint

Thin film transistors
Threshold voltage
Voltage control
threshold voltage
transistors
thin films
Atomic layer deposition
atomic layer epitaxy
low voltage
Fabrication
Glass
counters
Electric potential
Substrates
fabrication
glass

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Acoustics and Ultrasonics
  • Surfaces, Coatings and Films

Cite this

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Threshold voltage control in dual gate ZnO-based thin-film transistors operating at 5 v. / Park, Chan Ho; Im, Seongil.

In: Journal of Physics D: Applied Physics, Vol. 41, No. 24, 245112, 01.12.2008.

Research output: Contribution to journalArticle

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