TOSCA

Total scan power reduction architecture based on pseudo-random built-in self test structure

Kim Youbean, Song Dongsup, Kim Kicheol, Kim Incheol, Kang Sungho

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

Original languageEnglish
Title of host publicationProceedings of the 15th Asian Test Symposium 2006
Pages17-22
Number of pages6
Volume2006
DOIs
Publication statusPublished - 2006 Dec 1
Event15th Asian Test Symposium 2006 - Fukuoka, Japan
Duration: 2006 Nov 202006 Nov 23

Other

Other15th Asian Test Symposium 2006
CountryJapan
CityFukuoka
Period06/11/2006/11/23

Fingerprint

Built-in self test
Monitoring

All Science Journal Classification (ASJC) codes

  • Media Technology
  • Hardware and Architecture

Cite this

Youbean, K., Dongsup, S., Kicheol, K., Incheol, K., & Sungho, K. (2006). TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure. In Proceedings of the 15th Asian Test Symposium 2006 (Vol. 2006, pp. 17-22). [4030735] https://doi.org/10.1109/ATS.2006.260987
Youbean, Kim ; Dongsup, Song ; Kicheol, Kim ; Incheol, Kim ; Sungho, Kang. / TOSCA : Total scan power reduction architecture based on pseudo-random built-in self test structure. Proceedings of the 15th Asian Test Symposium 2006. Vol. 2006 2006. pp. 17-22
@inproceedings{87f510b2dac849bea646c0723854fa1f,
title = "TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure",
abstract = "Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60{\%} transition reduction, 2∼4{\%} fault coverage improvement, and 25{\%} scan-in and 26{\%} scan-out transition by the TOSCA.",
author = "Kim Youbean and Song Dongsup and Kim Kicheol and Kim Incheol and Kang Sungho",
year = "2006",
month = "12",
day = "1",
doi = "10.1109/ATS.2006.260987",
language = "English",
isbn = "0769526284",
volume = "2006",
pages = "17--22",
booktitle = "Proceedings of the 15th Asian Test Symposium 2006",

}

Youbean, K, Dongsup, S, Kicheol, K, Incheol, K & Sungho, K 2006, TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure. in Proceedings of the 15th Asian Test Symposium 2006. vol. 2006, 4030735, pp. 17-22, 15th Asian Test Symposium 2006, Fukuoka, Japan, 06/11/20. https://doi.org/10.1109/ATS.2006.260987

TOSCA : Total scan power reduction architecture based on pseudo-random built-in self test structure. / Youbean, Kim; Dongsup, Song; Kicheol, Kim; Incheol, Kim; Sungho, Kang.

Proceedings of the 15th Asian Test Symposium 2006. Vol. 2006 2006. p. 17-22 4030735.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - TOSCA

T2 - Total scan power reduction architecture based on pseudo-random built-in self test structure

AU - Youbean, Kim

AU - Dongsup, Song

AU - Kicheol, Kim

AU - Incheol, Kim

AU - Sungho, Kang

PY - 2006/12/1

Y1 - 2006/12/1

N2 - Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

AB - Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

UR - http://www.scopus.com/inward/record.url?scp=33947619059&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33947619059&partnerID=8YFLogxK

U2 - 10.1109/ATS.2006.260987

DO - 10.1109/ATS.2006.260987

M3 - Conference contribution

SN - 0769526284

SN - 9780769526287

VL - 2006

SP - 17

EP - 22

BT - Proceedings of the 15th Asian Test Symposium 2006

ER -

Youbean K, Dongsup S, Kicheol K, Incheol K, Sungho K. TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure. In Proceedings of the 15th Asian Test Symposium 2006. Vol. 2006. 2006. p. 17-22. 4030735 https://doi.org/10.1109/ATS.2006.260987