Total energy minimization of real-time tasks in an on-chip multiprocessor using dynamic voltage scaling efficiency metric

Hyunjin Kim, Hyejeong Hong, Hong Sik Kim, Jin Ho Ahn, Sungho Kang

Research output: Contribution to journalArticle

17 Citations (Scopus)


This paper proposes an algorithm that provides both dynamic voltage scaling and power shutdown to minimize the total energy consumption of an application executed on an on-chip multiprocessor. The proposed algorithm provides an extended schedule and stretch method, where task computations are iteratively stretched within the slack of a time-constrained dependent task set. In addition, the break-even threshold interval for amortizing the shutdown overhead is considered. By evaluating each set of stretched task computations, an energy-efficient set is obtained. The proposed dynamic voltage scaling efficiency metric is the ratio of the reduced energy to the increased cycle time when the supply voltage is scaled, which can be used to determine the task computation cycle to be stretched. Experimental results show that the proposed algorithm outperforms the traditional schedule and stretch method in the various evaluations of target real applications.

Original languageEnglish
Article number4655562
Pages (from-to)2088-2092
Number of pages5
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number11
Publication statusPublished - 2008 Nov 1


All Science Journal Classification (ASJC) codes

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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