Abstract
Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage hardware. In this work, we propose TraceTracker, a novel hardware/software co-evaluation method that allows users to reuse a broad range of the existing block traces by keeping most their execution contexts and user scenarios while adjusting them with new system information. Specifically, our TraceTracker's software evaluation model can infer CPU burst times and user idle periods from old storage traces, whereas its hardware evaluation method remasters the storage traces by interoperating the inferred time information, and updates all inter-arrival times by making them aware of the target storage system. We apply the proposed co-evaluation model to 577 traces, which were collected by servers from different institutions and locations a decade ago, and revive the traces on a high-performance flash-based storage array. The evaluation results reveal that the accuracy of the execution contexts reconstructed by TraceTracker is on average 99% and 96% with regard to the frequency of idle operations and the total idle periods, respectively.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 87-96 |
| Number of pages | 10 |
| ISBN (Electronic) | 9781538612323 |
| DOIs | |
| Publication status | Published - 2017 Dec 5 |
| Event | 2017 IEEE International Symposium on Workload Characterization, IISWC 2017 - Seattle, United States Duration: 2017 Oct 1 → 2017 Oct 3 |
Publication series
| Name | Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017 |
|---|---|
| Volume | 2017-January |
Other
| Other | 2017 IEEE International Symposium on Workload Characterization, IISWC 2017 |
|---|---|
| Country | United States |
| City | Seattle |
| Period | 17/10/1 → 17/10/3 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Information Systems and Management
Cite this
}
TraceTracker : Hardware/software co-evaluation for large-scale I/O workload reconstruction. / Kwon, Miryeong; Zhang, Jie; Park, Gyuyoung; Choi, Wonil; Donofrio, David; Shalf, John; Kandemir, Mahmut; Jung, Myoungsoo.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 87-96 (Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017; Vol. 2017-January).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - TraceTracker
T2 - Hardware/software co-evaluation for large-scale I/O workload reconstruction
AU - Kwon, Miryeong
AU - Zhang, Jie
AU - Park, Gyuyoung
AU - Choi, Wonil
AU - Donofrio, David
AU - Shalf, John
AU - Kandemir, Mahmut
AU - Jung, Myoungsoo
PY - 2017/12/5
Y1 - 2017/12/5
N2 - Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage hardware. In this work, we propose TraceTracker, a novel hardware/software co-evaluation method that allows users to reuse a broad range of the existing block traces by keeping most their execution contexts and user scenarios while adjusting them with new system information. Specifically, our TraceTracker's software evaluation model can infer CPU burst times and user idle periods from old storage traces, whereas its hardware evaluation method remasters the storage traces by interoperating the inferred time information, and updates all inter-arrival times by making them aware of the target storage system. We apply the proposed co-evaluation model to 577 traces, which were collected by servers from different institutions and locations a decade ago, and revive the traces on a high-performance flash-based storage array. The evaluation results reveal that the accuracy of the execution contexts reconstructed by TraceTracker is on average 99% and 96% with regard to the frequency of idle operations and the total idle periods, respectively.
AB - Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage hardware. In this work, we propose TraceTracker, a novel hardware/software co-evaluation method that allows users to reuse a broad range of the existing block traces by keeping most their execution contexts and user scenarios while adjusting them with new system information. Specifically, our TraceTracker's software evaluation model can infer CPU burst times and user idle periods from old storage traces, whereas its hardware evaluation method remasters the storage traces by interoperating the inferred time information, and updates all inter-arrival times by making them aware of the target storage system. We apply the proposed co-evaluation model to 577 traces, which were collected by servers from different institutions and locations a decade ago, and revive the traces on a high-performance flash-based storage array. The evaluation results reveal that the accuracy of the execution contexts reconstructed by TraceTracker is on average 99% and 96% with regard to the frequency of idle operations and the total idle periods, respectively.
UR - http://www.scopus.com/inward/record.url?scp=85046466212&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85046466212&partnerID=8YFLogxK
U2 - 10.1109/IISWC.2017.8167759
DO - 10.1109/IISWC.2017.8167759
M3 - Conference contribution
T3 - Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017
SP - 87
EP - 96
BT - Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
ER -