Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage hardware. In this work, we propose TraceTracker, a novel hardware/software co-evaluation method that allows users to reuse a broad range of the existing block traces by keeping most their execution contexts and user scenarios while adjusting them with new system information. Specifically, our TraceTracker's software evaluation model can infer CPU burst times and user idle periods from old storage traces, whereas its hardware evaluation method remasters the storage traces by interoperating the inferred time information, and updates all inter-arrival times by making them aware of the target storage system. We apply the proposed co-evaluation model to 577 traces, which were collected by servers from different institutions and locations a decade ago, and revive the traces on a high-performance flash-based storage array. The evaluation results reveal that the accuracy of the execution contexts reconstructed by TraceTracker is on average 99% and 96% with regard to the frequency of idle operations and the total idle periods, respectively.
|Title of host publication||Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||10|
|Publication status||Published - 2017 Dec 5|
|Event||2017 IEEE International Symposium on Workload Characterization, IISWC 2017 - Seattle, United States|
Duration: 2017 Oct 1 → 2017 Oct 3
|Name||Proceedings of the 2017 IEEE International Symposium on Workload Characterization, IISWC 2017|
|Other||2017 IEEE International Symposium on Workload Characterization, IISWC 2017|
|Period||17/10/1 → 17/10/3|
Bibliographical noteFunding Information:
This research is mainly supported by NRF 2016R1C1B2015312. This work is also supported in part by DOE DE-AC02-05CH 11231, IITP-2017-2017-0-01015, NRF-2015M3C4A7065645, and MemRay grant (2015-11-1731). Kandemir is supported in part by NSF grants 1439021, 1439057, 1409095, 1626251, 1629915, 1629129 and 1526750, and a grant from Intel. Myoungsoo Jung is the corresponding author.
© 2017 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Information Systems and Management