TY - JOUR
T1 - Two-dimensional iterative decoding schemes for holographic data storage systems
AU - Kim, Taehyung
AU - Kong, Gyuyeol
AU - Choi, Sooyong
PY - 2012/8
Y1 - 2012/8
N2 - Two iterative decoding (ID) schemes, which are the ID using a single parity bit (ID-SPB) and ID using a modulation code (ID-MC), are proposed for holographic data storage systems. In the ID-SPB, a single two-dimensional parity bit is employed to conduct ID, whereas in the ID-MC, the inherent constraint of the modulation code is utilized to conduct ID. In both schemes, a data page is iteratively decoded by exchanging extrinsic information between the horizontal and vertical data bits in the page. In particular, in the ID-SPB, by adding more parity bits to each row and column of the interleaved page, we can conduct the ID within a page as well as between the original and interleaved pages. Thus, additional performance gain can be achieved in the ID-SPB. On the other hand, the ID-MC has a performance gain without loss of data rate since parity bits are not required for ID. The simulation results show that the proposed ID-SPB and ID-MC have about 2-4 and 1-2 dB performance gains in terms of bit error rate compared with the system without ID, respectively.
AB - Two iterative decoding (ID) schemes, which are the ID using a single parity bit (ID-SPB) and ID using a modulation code (ID-MC), are proposed for holographic data storage systems. In the ID-SPB, a single two-dimensional parity bit is employed to conduct ID, whereas in the ID-MC, the inherent constraint of the modulation code is utilized to conduct ID. In both schemes, a data page is iteratively decoded by exchanging extrinsic information between the horizontal and vertical data bits in the page. In particular, in the ID-SPB, by adding more parity bits to each row and column of the interleaved page, we can conduct the ID within a page as well as between the original and interleaved pages. Thus, additional performance gain can be achieved in the ID-SPB. On the other hand, the ID-MC has a performance gain without loss of data rate since parity bits are not required for ID. The simulation results show that the proposed ID-SPB and ID-MC have about 2-4 and 1-2 dB performance gains in terms of bit error rate compared with the system without ID, respectively.
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U2 - 10.1143/JJAP.51.08JD06
DO - 10.1143/JJAP.51.08JD06
M3 - Article
AN - SCOPUS:84865247177
VL - 51
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
SN - 0021-4922
IS - 8 PART 3
M1 - 08JD06
ER -