Ultra-low temperature (below 100°C) Si TFT process for flexible display

Kyungbae Park; Hyuck Lim; Jangyeon Kwon; Jisim Jung; Doyoung Kim; Jongman Kim; Takashi Noguchi

Ultra-low temperature (below 100°C) Si TFT process for flexible display

Kyungbae Park, Hyuck Lim, Jangyeon Kwon, Jisim Jung, Doyoung Kim, Jongman Kim, Takashi Noguchi

School of Integrated Technology

Research output: Contribution to conference › Paper › peer-review

Abstract

The electrical characteristics of ultra-low temperature (below 100°C) SiO₂ films, which are prepared by ICP-CVD methods using silane and oxygen as silicon dioxide precursor, were evaluated. The breakdown field of SiO₂ shows as high as 7.8MV/cm², and the lower flat band voltage of SiO₂ is as low as -5V. Our ultra-low temperature process using both deposition of SiO₂ by ICP-CVD and gate AI metal by thermal evaporation is fully compatible with plastic substrates such as PES (PolyEthereSulfone) and PEN (PolyEtherNaphtalene). This promising result is expected to the advanced Active matrix flexible display process.

Original language	English
Pages	1225-1226
Number of pages	2
Publication status	Published - 2005
Event	IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005 - Takamatsu, Japan Duration: 2005 Dec 6 → 2005 Dec 9

Other

Other	IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005
Country/Territory	Japan
City	Takamatsu
Period	05/12/6 → 05/12/9

All Science Journal Classification (ASJC) codes

Engineering(all)

Cite this

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title = "Ultra-low temperature (below 100°C) Si TFT process for flexible display",

abstract = "The electrical characteristics of ultra-low temperature (below 100°C) SiO2 films, which are prepared by ICP-CVD methods using silane and oxygen as silicon dioxide precursor, were evaluated. The breakdown field of SiO2 shows as high as 7.8MV/cm2, and the lower flat band voltage of SiO2 is as low as -5V. Our ultra-low temperature process using both deposition of SiO2 by ICP-CVD and gate AI metal by thermal evaporation is fully compatible with plastic substrates such as PES (PolyEthereSulfone) and PEN (PolyEtherNaphtalene). This promising result is expected to the advanced Active matrix flexible display process.",

author = "Kyungbae Park and Hyuck Lim and Jangyeon Kwon and Jisim Jung and Doyoung Kim and Jongman Kim and Takashi Noguchi",

year = "2005",

language = "English",

pages = "1225--1226",

note = "IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005 ; Conference date: 06-12-2005 Through 09-12-2005",

}

Ultra-low temperature (below 100°C) Si TFT process for flexible display. / Park, Kyungbae; Lim, Hyuck; Kwon, Jangyeon; Jung, Jisim; Kim, Doyoung; Kim, Jongman; Noguchi, Takashi.

2005. 1225-1226 Paper presented at IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005, Takamatsu, Japan.

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Ultra-low temperature (below 100°C) Si TFT process for flexible display

AU - Park, Kyungbae

AU - Lim, Hyuck

AU - Kwon, Jangyeon

AU - Jung, Jisim

AU - Kim, Doyoung

AU - Kim, Jongman

AU - Noguchi, Takashi

PY - 2005

Y1 - 2005

N2 - The electrical characteristics of ultra-low temperature (below 100°C) SiO2 films, which are prepared by ICP-CVD methods using silane and oxygen as silicon dioxide precursor, were evaluated. The breakdown field of SiO2 shows as high as 7.8MV/cm2, and the lower flat band voltage of SiO2 is as low as -5V. Our ultra-low temperature process using both deposition of SiO2 by ICP-CVD and gate AI metal by thermal evaporation is fully compatible with plastic substrates such as PES (PolyEthereSulfone) and PEN (PolyEtherNaphtalene). This promising result is expected to the advanced Active matrix flexible display process.

AB - The electrical characteristics of ultra-low temperature (below 100°C) SiO2 films, which are prepared by ICP-CVD methods using silane and oxygen as silicon dioxide precursor, were evaluated. The breakdown field of SiO2 shows as high as 7.8MV/cm2, and the lower flat band voltage of SiO2 is as low as -5V. Our ultra-low temperature process using both deposition of SiO2 by ICP-CVD and gate AI metal by thermal evaporation is fully compatible with plastic substrates such as PES (PolyEthereSulfone) and PEN (PolyEtherNaphtalene). This promising result is expected to the advanced Active matrix flexible display process.

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T2 - IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005

Y2 - 6 December 2005 through 9 December 2005

ER -

Ultra-low temperature (below 100°C) Si TFT process for flexible display

Abstract

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All Science Journal Classification (ASJC) codes

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