Variability-insensitive scheme for NAND flash memory interfaces

C. I. Son, S. Yoon, S. W. Chung, C. I. Park, Eui-Young Chung

Research output: Contribution to journalArticle

Abstract

A novel NAND flash memory interface (NFMI) scheme to cope with uncertainty due to process, voltage and temperature (PVT) variations is proposed. The new NFMI scheme introduces a signal called data valid strobe to replace the signal read enable bar, which is a read strobe in the standard NFMI protocol. Experimental results show that the proposed scheme is insensitive to PVT variations, unlike the existing NFMI scheme, and hence substantially increases system performance as well as reliability.

Original languageEnglish
Pages (from-to)1335-1337
Number of pages3
JournalElectronics Letters
Volume42
Issue number23
DOIs
Publication statusPublished - 2006 Nov 16

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Flash memory
Electric potential
Temperature

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Son, C. I. ; Yoon, S. ; Chung, S. W. ; Park, C. I. ; Chung, Eui-Young. / Variability-insensitive scheme for NAND flash memory interfaces. In: Electronics Letters. 2006 ; Vol. 42, No. 23. pp. 1335-1337.
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Variability-insensitive scheme for NAND flash memory interfaces. / Son, C. I.; Yoon, S.; Chung, S. W.; Park, C. I.; Chung, Eui-Young.

In: Electronics Letters, Vol. 42, No. 23, 16.11.2006, p. 1335-1337.

Research output: Contribution to journalArticle

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