TY - GEN
T1 - Variation-Tolerant and low power look-up table (LUT) using spin-Torque transfer magnetic RAM for non-volatile field programmable gate array (FPGA)
AU - Jo, Kangwook
AU - Cho, Kyungseon
AU - Yoon, Hongil
N1 - Publisher Copyright:
© 2016 IEEE.
Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2016/12/27
Y1 - 2016/12/27
N2 - The non-volatile field programmable gate array (FPGA) is a promising candidate for the ultra-low-power computing due to its flexibility. However, the non-volatile devices have a critical drawback of reliability due to the process variations in read operation. We propose a novel look-up table scheme using the spin-Torque transfer magnetic RAM with high variation tolerance and low power consumption. The proposed 8- input look-up table (LUT) has a 74.4% smaller read power consumption than that of the conventional 8-input SRAM-based LUT. The area of the proposed LUT is comparable to that of the conventional SRAM-based LUT.
AB - The non-volatile field programmable gate array (FPGA) is a promising candidate for the ultra-low-power computing due to its flexibility. However, the non-volatile devices have a critical drawback of reliability due to the process variations in read operation. We propose a novel look-up table scheme using the spin-Torque transfer magnetic RAM with high variation tolerance and low power consumption. The proposed 8- input look-up table (LUT) has a 74.4% smaller read power consumption than that of the conventional 8-input SRAM-based LUT. The area of the proposed LUT is comparable to that of the conventional SRAM-based LUT.
UR - http://www.scopus.com/inward/record.url?scp=85010399990&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85010399990&partnerID=8YFLogxK
U2 - 10.1109/ISOCC.2016.7799753
DO - 10.1109/ISOCC.2016.7799753
M3 - Conference contribution
AN - SCOPUS:85010399990
T3 - ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things
SP - 101
EP - 102
BT - ISOCC 2016 - International SoC Design Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th International SoC Design Conference, ISOCC 2016
Y2 - 23 October 2016 through 26 October 2016
ER -