W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction

Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Since the probability of fault occurrence on memory has increased with the advance of memory density and capacity, memory repairs in wafer-level and package-level are widely used with redundancy analysis (RA) to improve memory yield. However, as the costs for memory repair also have increased in proportion to the memory density and capacity, the repair costs have occupied a significant portion of the total costs. To address the problem, one-time memory repair with wafer-level early repair analysis (W-ERA) for cost reduction is proposed in this paper. The proposed W-ERA facilitates that all unrepairable memories are classified rapidly without searching memory repair solutions in wafer-level and repairable memory faults occurred in wafer-level are repaired in package-level with additional faults occurred in package-level simultaneously. It means, as the costs of memory repair can be highly reduced since memory repair is skipped in wafer-level, the total costs also can be highly reduced. In addition, memory redundancies can be efficiently used for memory repair in package-level and it results a high repair rate achievement.

Original languageEnglish
Title of host publicationProceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages94-99
Number of pages6
ISBN (Electronic)9781728189444
DOIs
Publication statusPublished - 2020 Sep
Event4th IEEE International Test Conference in Asia, ITC-Asia 2020 - Taipei, Taiwan, Province of China
Duration: 2020 Sep 232020 Sep 25

Publication series

NameProceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020

Conference

Conference4th IEEE International Test Conference in Asia, ITC-Asia 2020
Country/TerritoryTaiwan, Province of China
CityTaipei
Period20/9/2320/9/25

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea(MSIT) (No. 2019R1A2C3011079).

Publisher Copyright:
© 2020 IEEE.

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Information Systems and Management
  • Safety, Risk, Reliability and Quality

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