We propose ZnG, a new GPU-SSD integrated architecture, which can maximize the memory capacity in a GPU and address performance penalties imposed by an SSD. Specifically, ZnG replaces all GPU internal DRAMs with an ultra-low-latency SSD to maximize the GPU memory capacity. ZnG further removes performance bottleneck of the SSD by replacing its flash channels with a high-throughput flash network and integrating SSD firmware in the GPU's MMU to reap the benefits of hardware accelerations. Although flash arrays within the SSD can deliver high accumulated bandwidth, only a small fraction of such bandwidth can be utilized by GPU's memory requests due to mismatches of their access granularity. To address this, ZnG employs a large L2 cache and flash registers to buffer the memory requests. Our evaluation results indicate that ZnG can achieve 7.5× higher performance than prior work.
|Title of host publication||Proceedings - 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture, ISCA 2020|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||12|
|Publication status||Published - 2020 May|
|Event||47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020 - Virtual, Online, Spain|
Duration: 2020 May 30 → 2020 Jun 3
|Name||Proceedings - International Symposium on Computer Architecture|
|Conference||47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020|
|Period||20/5/30 → 20/6/3|
Bibliographical noteFunding Information:
ACKNOWLEDGMENT We thank anonymous reviewers for their constructive feedback. This research is supported by NRF 2016R1C1B2015312, DOE DE-AC02-05CH 11231, KAIST Start-Up Grant (G01190015), and MemRay grant (G01190170).
© 2020 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture