The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm2/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDFZTrFE). The retention of the device lasted over 2 h.
Bibliographical noteFunding Information:
The authors acknowledge the financial support from KOSEF (Program Nos. 2002-03177 and R01-2006-000-11277-0), KITECH, and Brain Korea 21 Program.
All Science Journal Classification (ASJC) codes
- Physics and Astronomy (miscellaneous)